Verigy 93k Tester Manual <2026 Update>

To get correct results, the tester must stay calibrated. You should run checks regularly. System Calibration

Run an opens/shorts test. If all pins fail continuity, check the docking mechanism, the load board stiffener, or clean the pogo-pin interface.

Transitioning a program from engineering debug to high-volume manufacturing (HVM) requires code optimization. verigy 93k tester manual

SmarTest is the comprehensive software environment for programming and operating the 93K, and mastering its manuals is non-negotiable for efficient test development. The most current version is , which features a modern user interface. Key software tools you will find documented include:

: Lab guides for SmarTest software, testflow setup, pin configuration, and debugging. Third-Party & Add-on Guides To get correct results, the tester must stay calibrated

Always follow the exact sequence in the manual to start or stop the system. Turning it off incorrectly can damage the software or files. Electrostatic Discharge (ESD) Protection

Writing an optimized test program requires linking disparate configuration files into a unified sequence. Test Program Files If all pins fail continuity, check the docking

Test methods are executable software blocks written in C++ (SmarTest 7/8) or Java (SmarTest 8) that control the tester hardware. They extract data from the hardware registers, calculate parameters, and flag pass/fail criteria. Standard pre-coded test methods are provided by Advantest for typical tests, including: Continuity/Diode tests Leakage tests ( IILcap I sub cap I cap L end-sub IIHcap I sub cap I cap H end-sub IDD Gross/Static current consumption Functional vector execution Writing a Custom Functional Test Suite

Dedicated, high-current, low-noise power supplies designed to power up the Device Under Test (DUT) and measure static/dynamic IDD currents.

To operate the Verigy 93K tester:

The SmarTest software is divided into key operational sections: